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sw_board.h
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1 /*
2  * OpenVirtualization:
3  * For additional details and support contact developer@sierraware.com.
4  * Additional documentation can be found at www.openvirtualization.org
5  *
6  * Copyright (C) 2010-2014 SierraWare
7  *
8  * This library is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21  *
22  */
23 #ifndef __SW_BOARD_H__
24 #define __SW_BOARD_H__
25 
26 
27 //#include <sw_types.h>
28 #include <sw_board_asm.h>
29 
30 #define VE_FRAME_BASE 0x90100000
31 #define VE_FRAME_SIZE (1048576 * 3)
32 #define STACK_SIZE 4096
33 
34 #define EL3_START 0xf8000000
35 //#define S_EL1_START SECURE_WORLD_RAM_START
36 #define NS_EL2_START 0xf4000000
37 #define NS_EL1_START 0x80080000
38 
39 
40 
41 #define GIC_ITLINES 2
42 #define IRQ_GIC_START 32
43 #define GIC_MAX_NR 1
44 #define GIC_BANK_OFFSET 0x0
45 #define GIC_DIST_OFFSET 0x0
46 #define GIC_NR_IRQS (IRQ_GIC_START + 64)
47 #define GIC_CPU (0x2c000000 + 0x2000)
48 #define GIC_DIST (0x2c000000 + 0x1000)
49 
50 
51 #define NORMAL_WORLD_RAM_START 0x80000000
52 #define NSK_LOAD_ADDRESS NORMAL_WORLD_RAM_START
53 /* 1MB below SECURE_WORLD_RAM_START is reserved for "nsadmin" section*/
54 #define GUEST_MEM_SIZE 0x8000000
55 #define SECURE_WORLD_RAM_START (VE_FRAME_BASE + VE_FRAME_SIZE)
56 #define SECURE_WORLD_RAM_END (0x940FFFFF - 0x00100000)
57 
58 #define ELF_LOADER_START_ADDRESS ((u32 *)(0x93ffffff + 1))
59 
60 #define BASE_LOAD_ADDRESS (SECURE_WORLD_RAM_START - 0x01000000)
61 
62 #ifdef CONFIG_MULTI_GUESTS_SUPPORT
63 #define LINUX_INITRD_ADDR 0x88d00000
64 #define LINUX_INITRD_SIZE (8192 * 1024)
65 #endif
66 
67 #define VE_RS1_L2CC (0x2c100000)
68 
69 #define VE_RS1_SCU (VE_RS1_MPIC + 0x0000)
70 #define VE_RS1_MPCORE_TWD (VE_RS1_MPIC + 0x0600)
71 
72 #define VE_SYSTEM_REGS 0x1C010000
73 #define VE_CLCD_BASE 0x1C1F0000
74 #define VE_SYS_FLAGSSET_ADDR (VE_SYSTEM_REGS + 0x30)
75 #define VE_SYS_FLAGSCLR_ADDR (VE_SYSTEM_REGS + 0x34)
76 
77 /*
78  * Peripheral addresses
79  */
80 #define SYSCTL_BASE 0x1c020000
81 
82 #define TIMER0_BASE 0x1c110000
83 #define TIMER1_BASE 0x1c110020
84 #define TIMER2_BASE 0x1c120000
85 #define TIMER3_BASE 0x1c120020
86 #define TIMER_COUNT_MAX 0xFFFFFFFF
87 
88 #define UART0_ADDR 0x1C090000
89 #define UART1_ADDR 0x1C0A0000
90 #define UART2_ADDR 0x1C0B0000
91 #define UART3_ADDR 0x1C0C0000
92 /*
93  * Irqs
94  */
95 #define IRQ_GIC_START 32
96 #define GIC_NR_IRQS (IRQ_GIC_START + 64)
97 #define GIC_MAX_NR 1
98 
99 /* VE RS1 IRQs numbers definitions */
100 #define IRQ_TIMER_PAIR0 (2 + IRQ_GIC_START)
101 #define IRQ_TIMER_PAIR1 (3 + IRQ_GIC_START)
102 
103 #define FREE_RUNNING_TIMER_IRQ IRQ_TIMER_PAIR1
104 #define TICK_TIMER_IRQ IRQ_TIMER_PAIR1
105 
106 #define FREE_RUNNING_TIMER_BASE TIMER2_BASE
107 #define TICK_TIMER_BASE TIMER3_BASE
108 
109 #define SECURE_UART_BASE UART0_ADDR
110 
111 #define NO_OF_INTERRUPTS_IMPLEMENTED GIC_NR_IRQS
112 
113 /* Kernel Physical Base */
114 #if defined __KERNEL_EL1__
115 #define KERN_PA_BASE SECURE_WORLD_RAM_START
116 #elif defined __KERNEL_EL2__
117 #define KERN_PA_BASE NS_EL2_START
118 #elif defined __KERNEL_EL3__
119 #define KERN_PA_BASE EL3_START
120 #else
121 #error "Please select the kernel exception level"
122 #endif
123 
124 
125 
126 #ifdef OTZONE_ASYNC_NOTIFY_SUPPORT
127 #define NS_SGI_NOTIFY_INTERRUPT 0x7
128 #endif
129 
130 #define GIC_ITLINES 2
131 
132 #ifdef SCHEDULE_HIGH_PRIORITY_GUEST
133 #define HIGH_PRIORITY_GUEST 0
134 #define LOW_PRIORITY_GUEST_UART_IRQ 37
135 #endif
136 
142 //void board_map_secure_page_table(u32* pgd);
143 
149 //pa_t get_secure_ram_start_addr(void);
150 
156 //pa_t get_secure_ram_end_addr(void);
157 
161 //void board_init(void);
162 
166 //int board_mmc_init(void);
167 
168 //#define KERN_VA_BASE 0x80000000
169 #define KERN_VA_BASE SECURE_WORLD_RAM_START
170 #define KERN_GUEST_BASE 0x60000000
171 #define KERN_IO_BASE 0x40000000
172 #define KERN_IO_END 0x7FFFFFFF
173 
177 //void unmap_init_section(void);
178 
183 //void board_smc_handler();
184 
185 
186 #ifdef __CCODE__
187 #include <sw_types.h>
188 
189 
190 extern void *_binary_lower_el_kernel_start, *_binary_lower_el_kernel_end;
191 
192 
196 void board_init(void);
197 
198 
204 void board_map_secure_page_table(u32* pgd);
205 
206 
212 pa_t get_secure_ram_start_addr(void);
213 
214 
215 
221 pa_t get_secure_ram_end_addr(void);
222 
223 
228 void board_smc_handler();
229 
230 
231 
235 void unmap_init_section(void);
236 
237 
243 pa_t get_secure_ram_start(void);
244 
250 pa_t get_secure_ram_end(void);
251 
252 
253 
254 #ifdef __KERNEL_EL2__
255 extern void *_binary_guest1_dtb_start, *_binary_guest1_dtb_end;
256 #endif
257 #endif /* __CCODE__ */
258 
259 
260 #endif
void unmap_init_section(void)
This functions unmaps init and mod init from secure ram.
Definition: sw_board.c:120
void board_init(void)
Dummy function for board initialization.
Definition: sw_board.c:112
pa_t get_secure_ram_end_addr(void)
This function returns the End address of the Secure RAM.
Definition: sw_board.c:101
pa_t get_secure_ram_end(void)
This function returns the End address of the Secure RAM.
Definition: sw_board.c:76
pa_t get_secure_ram_start(void)
This functions returns the starting address of the Secure RAM.
Definition: sw_board.c:65
void board_map_secure_page_table(u32 *pgd)
This function maps the secure page table.
Definition: sw_board.c:132
void board_smc_handler()
Definition: sw_board.c:184
pa_t get_secure_ram_start_addr(void)
This functions returns the starting address of the Secure RAM.
Definition: sw_board.c:89