My Project
 All Classes Files Functions Variables Typedefs Enumerations Enumerator Macros Pages
Macros
sw_board.h File Reference
#include <sw_board_asm.h>

Go to the source code of this file.

Macros

#define VE_FRAME_BASE   0x90100000
 
#define VE_FRAME_SIZE   (1048576 * 3)
 
#define STACK_SIZE   4096
 
#define EL3_START   0xf8000000
 
#define NS_EL2_START   0xf4000000
 
#define NS_EL1_START   0x80080000
 
#define GIC_ITLINES   2
 
#define IRQ_GIC_START   32
 
#define GIC_MAX_NR   1
 
#define GIC_BANK_OFFSET   0x0
 
#define GIC_DIST_OFFSET   0x0
 
#define GIC_NR_IRQS   (IRQ_GIC_START + 64)
 
#define GIC_CPU   (0x2c000000 + 0x2000)
 
#define GIC_DIST   (0x2c000000 + 0x1000)
 
#define NORMAL_WORLD_RAM_START   0x80000000
 
#define NSK_LOAD_ADDRESS   NORMAL_WORLD_RAM_START
 
#define GUEST_MEM_SIZE   0x8000000
 
#define SECURE_WORLD_RAM_START   (VE_FRAME_BASE + VE_FRAME_SIZE)
 
#define SECURE_WORLD_RAM_END   (0x940FFFFF - 0x00100000)
 
#define ELF_LOADER_START_ADDRESS   ((u32 *)(0x93ffffff + 1))
 
#define BASE_LOAD_ADDRESS   (SECURE_WORLD_RAM_START - 0x01000000)
 
#define VE_RS1_L2CC   (0x2c100000)
 
#define VE_RS1_SCU   (VE_RS1_MPIC + 0x0000)
 
#define VE_RS1_MPCORE_TWD   (VE_RS1_MPIC + 0x0600)
 
#define VE_SYSTEM_REGS   0x1C010000
 
#define VE_CLCD_BASE   0x1C1F0000
 
#define VE_SYS_FLAGSSET_ADDR   (VE_SYSTEM_REGS + 0x30)
 
#define VE_SYS_FLAGSCLR_ADDR   (VE_SYSTEM_REGS + 0x34)
 
#define SYSCTL_BASE   0x1c020000
 
#define TIMER0_BASE   0x1c110000
 
#define TIMER1_BASE   0x1c110020
 
#define TIMER2_BASE   0x1c120000
 
#define TIMER3_BASE   0x1c120020
 
#define TIMER_COUNT_MAX   0xFFFFFFFF
 
#define UART0_ADDR   0x1C090000
 
#define UART1_ADDR   0x1C0A0000
 
#define UART2_ADDR   0x1C0B0000
 
#define UART3_ADDR   0x1C0C0000
 
#define IRQ_GIC_START   32
 
#define GIC_NR_IRQS   (IRQ_GIC_START + 64)
 
#define GIC_MAX_NR   1
 
#define IRQ_TIMER_PAIR0   (2 + IRQ_GIC_START)
 
#define IRQ_TIMER_PAIR1   (3 + IRQ_GIC_START)
 
#define FREE_RUNNING_TIMER_IRQ   IRQ_TIMER_PAIR1
 
#define TICK_TIMER_IRQ   IRQ_TIMER_PAIR1
 
#define FREE_RUNNING_TIMER_BASE   TIMER2_BASE
 
#define TICK_TIMER_BASE   TIMER3_BASE
 
#define SECURE_UART_BASE   UART0_ADDR
 
#define NO_OF_INTERRUPTS_IMPLEMENTED   GIC_NR_IRQS
 
#define GIC_ITLINES   2
 
#define KERN_VA_BASE   SECURE_WORLD_RAM_START
 Board specific eMMC init routine. More...
 
#define KERN_GUEST_BASE   0x60000000
 
#define KERN_IO_BASE   0x40000000
 
#define KERN_IO_END   0x7FFFFFFF
 

Macro Definition Documentation

#define BASE_LOAD_ADDRESS   (SECURE_WORLD_RAM_START - 0x01000000)
#define EL3_START   0xf8000000
#define ELF_LOADER_START_ADDRESS   ((u32 *)(0x93ffffff + 1))
#define FREE_RUNNING_TIMER_BASE   TIMER2_BASE
#define FREE_RUNNING_TIMER_IRQ   IRQ_TIMER_PAIR1
#define GIC_BANK_OFFSET   0x0
#define GIC_CPU   (0x2c000000 + 0x2000)
#define GIC_DIST   (0x2c000000 + 0x1000)
#define GIC_DIST_OFFSET   0x0
#define GIC_ITLINES   2
#define GIC_ITLINES   2
#define GIC_MAX_NR   1
#define GIC_MAX_NR   1
#define GIC_NR_IRQS   (IRQ_GIC_START + 64)
#define GIC_NR_IRQS   (IRQ_GIC_START + 64)
#define GUEST_MEM_SIZE   0x8000000
#define IRQ_GIC_START   32
#define IRQ_GIC_START   32
#define IRQ_TIMER_PAIR0   (2 + IRQ_GIC_START)
#define IRQ_TIMER_PAIR1   (3 + IRQ_GIC_START)
#define KERN_GUEST_BASE   0x60000000
#define KERN_IO_BASE   0x40000000
#define KERN_IO_END   0x7FFFFFFF
#define KERN_VA_BASE   SECURE_WORLD_RAM_START

Board specific eMMC init routine.

Parameters
pgd
Returns
#define NO_OF_INTERRUPTS_IMPLEMENTED   GIC_NR_IRQS
#define NORMAL_WORLD_RAM_START   0x80000000
#define NS_EL1_START   0x80080000
#define NS_EL2_START   0xf4000000
#define NSK_LOAD_ADDRESS   NORMAL_WORLD_RAM_START
#define SECURE_UART_BASE   UART0_ADDR
#define SECURE_WORLD_RAM_END   (0x940FFFFF - 0x00100000)
#define SECURE_WORLD_RAM_START   (VE_FRAME_BASE + VE_FRAME_SIZE)
#define STACK_SIZE   4096
#define SYSCTL_BASE   0x1c020000
#define TICK_TIMER_BASE   TIMER3_BASE
#define TICK_TIMER_IRQ   IRQ_TIMER_PAIR1
#define TIMER0_BASE   0x1c110000
#define TIMER1_BASE   0x1c110020
#define TIMER2_BASE   0x1c120000
#define TIMER3_BASE   0x1c120020
#define TIMER_COUNT_MAX   0xFFFFFFFF
#define UART0_ADDR   0x1C090000
#define UART1_ADDR   0x1C0A0000
#define UART2_ADDR   0x1C0B0000
#define UART3_ADDR   0x1C0C0000
#define VE_CLCD_BASE   0x1C1F0000
#define VE_FRAME_BASE   0x90100000
#define VE_FRAME_SIZE   (1048576 * 3)
#define VE_RS1_L2CC   (0x2c100000)
#define VE_RS1_MPCORE_TWD   (VE_RS1_MPIC + 0x0600)
#define VE_RS1_SCU   (VE_RS1_MPIC + 0x0000)
#define VE_SYS_FLAGSCLR_ADDR   (VE_SYSTEM_REGS + 0x34)
#define VE_SYS_FLAGSSET_ADDR   (VE_SYSTEM_REGS + 0x30)
#define VE_SYSTEM_REGS   0x1C010000