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gic_svisor.h
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1 /*
2  * OpenVirtualization:
3  * For additional details and support contact developer@sierraware.com.
4  * Additional documentation can be found at www.openvirtualization.org
5  *
6  * Copyright (C) 2010-2014 SierraWare
7  *
8  * This library is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21  *
22  */
23 /*
24  * Header file GIC functions.
25  */
26 
27 #ifndef __COMMON_GIC_H__
28 #define __COMMON_GIC_H__
29 
30 #include <sw_types.h>
31 #include <sw_board.h>
32 #include <sw_io.h>
33 
34 #define GIC_CPU_CTRL 0x00
35 #define GIC_CPU_PRIMASK 0x04
36 #define GIC_CPU_BINPOINT 0x08
37 #define GIC_CPU_INTACK 0x0c
38 #define GIC_CPU_EOI 0x10
39 #define GIC_CPU_RUNNINGPRI 0x14
40 #define GIC_CPU_HIGHPRI 0x18
41 #define GIC_CPU_APR 0xD0
42 #define GIC_CPU_NS_APR 0xE0
43 #define GIC_CPU_DEACTIVATE 0x1000
44 
45 #define GIC_DIST_CTRL 0x000
46 #define GIC_DIST_CTR 0x004
47 #define GIC_DIST_IIDR 0x008
48 #define GIC_DIST_SECURITY 0x80
49 #define GIC_DIST_SECURITY_END 0xFC
50 #define GIC_DIST_ENABLE_SET 0x100
51 #define GIC_DIST_ENABLE_SET_END 0x17C
52 #define GIC_DIST_ENABLE_CLEAR 0x180
53 #define GIC_DIST_ENABLE_CLEAR_END 0x1FC
54 #define GIC_DIST_PENDING_SET 0x200
55 #define GIC_DIST_PENDING_SET_END 0x27C
56 #define GIC_DIST_PENDING_CLEAR 0x280
57 #define GIC_DIST_PENDING_CLEAR_END 0x2FC
58 #define GIC_DIST_ACTIVE_BIT 0x300
59 #define GIC_DIST_ACTIVE_BIT_END 0x37C
60 #define GIC_DIST_CLEAR_ACTIVE_BIT 0x380
61 #define GIC_DIST_CLEAR_ACTIVE_BIT_END 0x3FC
62 #define GIC_DIST_PRI 0x400
63 #define GIC_DIST_PRI_END 0x7F8
64 #define GIC_DIST_TARGET 0x800
65 #define GIC_DIST_TARGET_END 0xBF8
66 #define GIC_DIST_CONFIG 0xC00
67 #define GIC_DIST_CONFIG_END 0xCFC
68 #define GIC_DIST_NSACR 0xE00
69 #define GIC_DIST_NSACR_END 0xEFC
70 #define GIC_DIST_SOFTINT 0xF00
71 #define GIC_DIST_SGI_CPENDING 0xF10
72 #define GIC_DIST_SGI_CPENDING_END 0xF1C
73 #define GIC_DIST_SGI_SPENDING 0xF20
74 #define GIC_DIST_SGI_SPENDING_END 0xF2C
75 #define GIC_DIST_ICPIDR2 0xFE8
76 
77 #define GIC_V1 0x1
78 #define GIC_V2 0x2
79 
80 #define GICH_HCR 0x00
81 #define GICH_VTR 0x04
82 #define GICH_VMCR 0x08
83 #define GICH_MISR 0x10
84 #define GICH_EISR0 0x20
85 #define GICH_EISR1 0x24
86 #define GICH_ELSR0 0x30
87 #define GICH_ELSR1 0x34
88 #define GICH_APR 0xF0
89 #define GICH_LR 0x100
90 
91 #define GIC_DIST_SOFTINT_NSATT_SET (1 << 15)
92 #define GICD_SGIR_CPULIST_SHIFT 16
93 #define GICD_SGIR_CPULIST_MASK 0xff
94 #define GICD_SGIR_SGIINTID_SHIFT 0
95 #define GICD_SGIR_SGIINTID_MASK 0xf
96 
97 #define GIC_DIST_SOFTINT_TAR_CORE (1 << 16)
98 #define GIC_DIST_SOFTINT_TARGET(n) ((GIC_DIST_SOFTINT_TAR_CORE) << (n))
99 
100 #define GIC_DIST_SOFTINT_TAR_CORE0 (1 << 16)
101 #define GIC_DIST_SOFTINT_TAR_CORE1 (1 << 17)
102 
103 #define GIC_DIST_CTL_ENABLE 0x1
104 #define GIC_DIST_TYPE_LINES 0x01f
105 #define GIC_DIST_TYPE_CPUS 0x0e0
106 #define GIC_DIST_TYPE_SEC 0x400
107 
108 #define GICH_HCR_EN (1 << 0)
109 #define GICH_HCR_UIE (1 << 1)
110 #define GICH_HCR_LRENPIE (1 << 2)
111 #define GICH_HCR_NPIE (1 << 3)
112 #define GICH_HCR_VGRP0EIE (1 << 4)
113 #define GICH_HCR_VGRP0DIE (1 << 5)
114 #define GICH_HCR_VGRP1EIE (1 << 6)
115 #define GICH_HCR_VGRP1DIE (1 << 7)
116 
117 #define GICH_MISR_EOI (1 << 0)
118 #define GICH_MISR_U (1 << 1)
119 #define GICH_MISR_LRENP (1 << 2)
120 #define GICH_MISR_NP (1 << 3)
121 #define GICH_MISR_VGRP0E (1 << 4)
122 #define GICH_MISR_VGRP0D (1 << 5)
123 #define GICH_MISR_VGRP1E (1 << 6)
124 #define GICH_MISR_VGRP1D (1 << 7)
125 
126 #define GICH_LR_VIRTUAL_MASK 0x3ff
127 #define GICH_LR_VIRTUAL_SHIFT 0
128 #define GICH_LR_PHYSICAL_MASK 0x3ff
129 #define GICH_LR_PHYSICAL_SHIFT 10
130 #define GICH_LR_CPUID_MASK 0x7
131 #define GICH_LR_CPUID_SHIFT 10
132 #define GICH_LR_EOIF_SHIFT 19
133 #define GICH_LR_STATE_MASK 0x3
134 #define GICH_LR_STATE_SHIFT 28
135 #define GICH_LR_PRIORITY_SHIFT 23
136 #define GICH_LR_EOIF (1<<19)
137 #define GICH_LR_PENDING (1<<28)
138 #define GICH_LR_ACTIVE (1<<29)
139 #define GICH_LR_GRP1 (1<<30)
140 #define GICH_LR_HW (1<<31)
141 #define GICH_VTR_NRLRGS 0x3f
142 
143 #define CPUID_MASK 0x1C00
144 #define CPUID_SHIFT 10
145 
146 #define GIC_DIST_SIZE 0x1000
147 #define GIC_CPU_SIZE 0x2000
148 
154 int gic_dist_init(void);
155 
161 int gic_cpu_init(void);
162 
168 static inline void gic_write(u32 val, va_t addr)
169 {
170  sw_writel(val, (void *)(addr));
171 }
172 
180 static inline u32 gic_read(va_t addr)
181 {
182  return sw_readl((void *)(addr));
183 }
184 
188 void gic_init(void);
189 
190 int gic_unmask(u32 gic_nr, u32 irq);
191 
192 int gic_ack_irq(u32 gic_nr, u32 irq);
193 
194 int gic_active_irq(u32 gic_nr);
195 
196 void generate_soft_int_to_core0(u32 int_id);
197 #endif
void generate_soft_int_to_core0(u32 int_id)
Generate software interrupt specific to core0.
Definition: gic.c:358
int gic_ack_irq(u32 gic_nr, u32 irq)
Acknowledges the interrupt request of Generic interrupt controller.
Definition: gic.c:115
void gic_init(void)
Definition: gic_svisor.c:315
int gic_active_irq(u32 gic_nr)
reads the generic interrupt control register
Definition: gic.c:91
int gic_unmask(u32 gic_nr, u32 irq)
Unmask a particular interrupt request of the Generic interrupt controller.
Definition: gic.c:171
int gic_dist_init(void)
This function is to initialize distributor block of Generic interrupt controller. ...
Definition: gic.c:197
int gic_cpu_init(void)
This function is used to initialize CPU interfaces of Generic interrupt controller.
Definition: gic.c:314