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cpu_asm.h
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1 /*
2  * OpenVirtualization:
3  * For additional details and support contact developer@sierraware.com.
4  * Additional documentation can be found at www.openvirtualization.org
5  *
6  * Copyright (C) 2010-2014 SierraWare
7  *
8  * This library is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21  *
22  */
23 /*
24  * Header for cpu_asm implementation
25  */
26 
27 #ifndef __ARMV7_CPU_ASM_H__
28 #define __ARMV7_CPU_ASM_H__
29 
30 #include <smc_id.h>
31 
32 /* assembler definitions */
33 #define Mode_USR 0x10
34 #define Mode_FIQ 0x11
35 #define Mode_IRQ 0x12
36 #define Mode_SVC 0x13
37 #define Mode_MON 0x16
38 #define Mode_ABT 0x17
39 #define Mode_UNDEF 0x1B
40 #define Mode_SYS 0x1F
41 
42 
43 #define I_BIT 0x80
44 #define F_BIT 0x40
45 
46 
47 #define SCR_NS_BIT 0x1
48 #define SCR_FIQ_BIT 0x4
49 #define SCR_IRQ_BIT 0x2
50 
51 #define CPSR_RESET_VAL 0x00000193
52 #define SCTLR_RESET_VAL 0x00c50078
53 
54 #define AUXREG_SMP 0x41
55 
56 #define AUXREG_SMP_ENABLE 0x40
57 #define AUXREG_FW 0x1
58 
59 #ifdef CONFIG_NEON_SUPPORT
60 /* VFP Unit values*/
61 #define FPEXC_EX (1 << 31)
62 #define FPEXC_EN (1 << 30)
63 #define MVFR0_A_SIMD_BIT (0)
64 #define MVFR0_A_SIMD_MASK (0xf << MVFR0_A_SIMD_BIT)
65 #endif
66 
67 /* Fix Me - Need to be auto generated and moved to better place */
68 #define SCTLR_OFFSET 120
69 #define SPSR_MON_OFFSET 52
70 #define LR_MON_OFFSET 56
71 
72 /* TzHyp */
73 #define NS_PREEMPT_ENABLE 0x1
74 #define NS_PREEMPT_DISABLE 0x0
75 #define NS_SWITCH_ACTIVE 0x1
76 #define NS_SWITCH_CLEAR 0x0
77 
78 /* SMC Identifiers for secure world functions */
79 #define INVOKE_NON_SECURE_KERNEL 0x0ffffff1
80 #define RET_FROM_SECURE_API 0x0ffffff2
81 #define INVOKE_NS_KER_SMP 0x0ffffff3
82 #define TZHYP_NSCPU_CTXT_INIT 0x0ffffff4
83 #define TZHYP_NSADMIN_RETURN 0x0ffffff5
84 
85 #define SEC_SGI_TO_SECONDARY_CORE 0xB
86 #define SEC_SGI_TO_PRIMARY_CORE 0xA
87 
88 //#define STACK_SIZE 4096
89 #define STACK_SIZE_SHIFT 12
90 
91 #define PARAM_STACK_SIZE 8
92 #define PARAM_STACK_SIZE_SHIFT 5 /* ( 3 + 2) */
93 
94 #define PARAM_OUT_STACK_SIZE 8
95 #define PARAM_OUT_STACK_SIZE_SHIFT 5 /* (3 + 2) */
96 
97 #define SYS_CONTEXT_CORE_SHIFT 8
98 
99 #endif