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asm_macros.h File Reference

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Variables

rt is temporary register macro
scr_nsbit_set rt mrc 
p15
 
rt is temporary register macro
scr_nsbit_set rt mrc 
rt
 
rt is temporary register macro
scr_nsbit_set rt mrc 
c1
 
rt is temporary register macro
scr_nsbit_set rt mrc Read
Secure Configuration Register
orr mcr Write Secure
Configuration Register endm
macro scr_nsbit_clear rt mrc
Read Secure Configuration
Register bic mcr Write Secure
Configuration Register endm
macro GET_CPU_ID rt mrc 
c0
 
rt is temporary register macro
scr_nsbit_set rt mrc Read
Secure Configuration Register
orr mcr Write Secure
Configuration Register endm
macro scr_nsbit_clear rt mrc
Read Secure Configuration
Register bic mcr Write Secure
Configuration Register endm
macro GET_CPU_ID rt mrc Read
CPU ID register and endm macro
GET_CORE_CONTEXT contextp 
push
 
rt is temporary register macro
scr_nsbit_set rt mrc Read
Secure Configuration Register
orr mcr Write Secure
Configuration Register endm
macro scr_nsbit_clear rt mrc
Read Secure Configuration
Register bic mcr Write Secure
Configuration Register endm
macro GET_CPU_ID rt mrc Read
CPU ID register and endm macro
GET_CORE_CONTEXT contextp add 
r0
 
rt is temporary register macro
scr_nsbit_set rt mrc Read
Secure Configuration Register
orr mcr Write Secure
Configuration Register endm
macro scr_nsbit_clear rt mrc
Read Secure Configuration
Register bic mcr Write Secure
Configuration Register endm
macro GET_CPU_ID rt mrc Read
CPU ID register and endm macro
GET_CORE_CONTEXT contextp add 
r1
 

Variable Documentation

rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc c0
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr c1
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc p15
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc Read CPU ID register and endm macro GET_CORE_CONTEXT contextp push
Initial value:
{r1}
GET_CPU_ID r1
ldr r0
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc Read CPU ID register and endm macro GET_CORE_CONTEXT contextp add r1
Definition: asm_macros.h:55
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc Read CPU ID register and endm macro GET_CORE_CONTEXT contextp add r0
Definition: asm_macros.h:55
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc Read CPU ID register and endm macro GET_CORE_CONTEXT contextp add r0
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc Read CPU ID register and endm macro GET_CORE_CONTEXT contextp add r1
rt is temporary register macro scr_nsbit_set rt mrc Read Secure Configuration Register orr mcr Write Secure Configuration Register endm macro scr_nsbit_clear rt mrc Read Secure Configuration Register bic mcr Write Secure Configuration Register endm macro GET_CPU_ID rt mrc Read CPU ID register and rt