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system_context.h
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1 /*
2  * OpenVirtualization:
3  * For additional details and support contact developer@sierraware.com.
4  * Additional documentation can be found at www.openvirtualization.org
5  *
6  * Copyright (C) 2010-2014 SierraWare
7  *
8  * This library is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21  *
22  */
23 /*
24  * Header for system context declarations
25  */
26 
27 #ifndef SYSTEM_CONTEXT_H
28 #define SYSTEM_CONTEXT_H
29 
30 #include <sw_types.h>
31 #include <sw_board.h> /* for GIC_ITLINES */
32 #include <cpu.h>
33 
34 
38 struct core_context {
39  u32 r0;
40  u32 r1;
41  u32 r2;
42  u32 r3;
43  u32 r4;
44  u32 r5;
45  u32 r6;
46  u32 r7;
47  u32 r8;
48  u32 r9;
49  u32 r10;
50  u32 r11;
51  u32 r12;
52  u32 spsr_mon;
53  u32 lr_mon;
54  u32 spsr_svc;
55  u32 r13_svc;
56  u32 lr_svc;
57  u32 r13_sys;
58  u32 lr_sys;
59  u32 spsr_abt;
60  u32 r13_abt;
61  u32 lr_abt;
63  u32 r13_undef;
64  u32 lr_undef;
65  u32 spsr_irq;
66  u32 r13_irq;
67  u32 lr_irq;
68 };
69 
73 struct cp15_context {
74  u32 c0_CSSELR; /* Cache Size Selection Register */
75  u32 c1_SCTLR; /* System Control Register */
76  u32 c1_ACTLR; /* Auxilliary Control Register */
77  u32 c2_TTBR0; /* Translation Table Base Register 0 */
78  u32 c2_TTBR1; /* Translation Table Base Register 1 */
79  u32 c2_TTBCR; /* Translation Table Base Register Control */
80  u32 c3_DACR; /* Domain Access Control Register */
81  u32 c5_DFSR; /* Data Fault Status Register */
82  u32 c5_IFSR; /* Instruction Fault Status Register */
83  u32 c6_DFAR; /* Data Fault Address Register */
84  u32 c6_IFAR; /* Instruction Fault Address Register */
85  u32 c7_PAR; /* Physical Address Register */
86  u32 c10_PRRR; /* PRRR */
87  u32 c10_NMRR; /* NMRR */
88  u32 c12_VBAR; /* VBAR register */
89  u32 c13_FCSEIDR; /* FCSE PID Register */
90  u32 c13_CONTEXTIDR; /* Context ID Register */
91  u32 c13_TPIDRURW; /* User Read/Write Thread and Process ID */
92  u32 c13_TPIDRURO; /* User Read-only Thread and Process ID */
93  u32 c13_TPIDRPRW; /* Privileged only Thread and Process ID */
94 };
95 
96 
100 struct gic_context {
102 };
103 
104 #ifdef CONFIG_NEON_SUPPORT
105 
109 typedef struct {
110  u32 d_low_word;
111  u32 d_high_word;
112 } double_word_reg;
113 
118 struct vfp_context {
119  u32 FPEXC; /* Floating point Exception Register*/
120  u32 FPSCR; /* Floating point Status and control Register*/
121  u32 FPSID; /* Floating point system ID Register*/
122  double_word_reg d[32]; /* 32 double word Registers*/
123 };
124 #endif
125 /*
126  * Please do not change the order of the members, until we remove the
127  * below assumption made by cpu context (core registers) switching code in
128  * monitor mode
129  *
130  * struct system_context x;
131  * "&x.sysctxt_core" is same as "&x"
132  */
134  /* CPU context */
137  /* Devices */
139 
140  #ifdef CONFIG_NEON_SUPPORT
141  struct vfp_context sysctxt_vfp;
142  #endif
143  u32 guest_no;
144  /*
145  * to make the size a power of 2, so that multiplication can be acheived
146  * by logical shift
147  */
148 
149  u32 pad[8];
150 } __attribute__ ((aligned (CACHELINE_SIZE)));
151 
152 
159 extern void tzhyp_sysregs_switch(struct cp15_context *reg1, struct cp15_context *reg2);
160 
161 
167 extern void tzhyp_sysregs_save(struct cp15_context *reg);
168 
169 #endif
u32 lr_mon
Definition: system_context.h:53
u32 lr_undef
Definition: system_context.h:64
#define GIC_ITLINES
Definition: sw_board.h:130
u32 c2_TTBCR
Definition: system_context.h:79
u32 r10
Definition: system_context.h:49
u32 spsr_irq
Definition: system_context.h:65
struct core_context sysctxt_core
Definition: system_context.h:135
u32 r13_undef
Definition: system_context.h:63
struct gic_context sysctxt_gic
Definition: system_context.h:138
u32 r3
Definition: system_context.h:42
u32 c2_TTBR1
Definition: system_context.h:78
u32 r7
Definition: system_context.h:46
u32 r1
Definition: system_context.h:40
u32 pad[8]
Definition: system_context.h:149
u32 c5_IFSR
Definition: system_context.h:82
u32 spsr_mon
Definition: system_context.h:52
u32 r4
Definition: system_context.h:43
u32 guest_no
Definition: system_context.h:143
u32 spsr_abt
Definition: system_context.h:59
u32 c0_CSSELR
Definition: system_context.h:74
Definition: system_context.h:38
u32 spsr_undef
Definition: system_context.h:62
u32 r8
Definition: system_context.h:47
u32 c13_TPIDRURO
Definition: system_context.h:92
u32 c6_DFAR
Definition: system_context.h:83
Definition: system_context.h:100
u32 c13_CONTEXTIDR
Definition: system_context.h:90
u32 c7_PAR
Definition: system_context.h:85
u32 c13_TPIDRPRW
Definition: system_context.h:93
u32 lr_svc
Definition: system_context.h:56
u32 c12_VBAR
Definition: system_context.h:88
u32 r12
Definition: system_context.h:51
struct cp15_context sysctxt_cp15
Definition: system_context.h:136
u32 c10_NMRR
Definition: system_context.h:87
u32 c13_TPIDRURW
Definition: system_context.h:91
u32 r9
Definition: system_context.h:48
u32 r13_abt
Definition: system_context.h:60
u32 r13_sys
Definition: system_context.h:57
void tzhyp_sysregs_save(struct cp15_context *reg)
Definition: system_context.h:133
struct system_context __attribute__((aligned(CACHELINE_SIZE)))
u32 r2
Definition: system_context.h:41
u32 r0
Definition: system_context.h:39
u32 c1_SCTLR
Definition: system_context.h:75
#define CACHELINE_SIZE
Definition: cpu.h:32
void tzhyp_sysregs_switch(struct cp15_context *reg1, struct cp15_context *reg2)
u32 r5
Definition: system_context.h:44
u32 r11
Definition: system_context.h:50
u32 r13_svc
Definition: system_context.h:55
u32 lr_sys
Definition: system_context.h:58
u32 spsr_svc
Definition: system_context.h:54
u32 r6
Definition: system_context.h:45
u32 c10_PRRR
Definition: system_context.h:86
u32 lr_irq
Definition: system_context.h:67
u32 c13_FCSEIDR
Definition: system_context.h:89
u32 r13_irq
Definition: system_context.h:66
u32 gic_icdiser[GIC_ITLINES]
Definition: system_context.h:101
u32 c2_TTBR0
Definition: system_context.h:77
u32 lr_abt
Definition: system_context.h:61
Definition: system_context.h:73
u32 c5_DFSR
Definition: system_context.h:81
u32 c3_DACR
Definition: system_context.h:80
u32 c6_IFAR
Definition: system_context.h:84
u32 c1_ACTLR
Definition: system_context.h:76