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sw_board.h
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1 /*
2  * OpenVirtualization:
3  * For additional details and support contact developer@sierraware.com.
4  * Additional documentation can be found at www.openvirtualization.org
5  *
6  * Copyright (C) 2010-2014 SierraWare
7  *
8  * This library is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21  *
22  */
23 #ifndef __SW_BOARD_H__
24 #define __SW_BOARD_H__
25 
26 #define MAX_CORES 0x1
27 
28 #define MAX_GUESTS 0x1
29 
30 #define EL3_START 0xf8000000
31 #define S_EL1_START 0xfc000000
32 #define NS_EL2_START 0xf4000000
33 #define NS_EL1_START 0x80080000
34 
35 #define SECURE_WORLD_RAM_START 0xfc000000
36 #define SECURE_WORLD_RAM_END 0xffffffff
37 
38 #define TIMER_COUNT_MAX 0xFFFFFFFFFFFFFFFF
39 #define TIMER_PERIOD_US 0.01
40 
41 #define GIC_ITLINES 2
42 #define IRQ_GIC_START 32
43 #define GIC_MAX_NR 1
44 #define GIC_BANK_OFFSET 0x0
45 #define GIC_DIST_OFFSET 0x0
46 #define GIC_NR_IRQS (IRQ_GIC_START + 64)
47 #define GIC_CPU (0x2c000000 + 0x2000)
48 #define GIC_DIST (0x2c000000 + 0x1000)
49 
50 #define UART_DEVS 4
51 #define UART0_ADDR 0x1C090000
52 #define UART1_ADDR 0x1C0A0000
53 #define UART2_ADDR 0x1C0B0000
54 #define UART3_ADDR 0x1C0C0000
55 
56 #define STACK_SIZE 0x1000
57 #define STACK_SHIFT 12
58 
59 
60 #define TICK_TIMER_BASE 0
61 
62 #define KEY_PRESS_IRQ 40
63 #define TICK_TIMER_IRQ 29
64 #define FREE_RUNNING_TIMER_IRQ 0
65 
66 #define CONFIG_BOARD_IPS_40
67 #define ARMV8_PAGE4K_ADDR39BITS
68 
69 /* Kernel Physical Base */
70 #if defined __KERNEL_EL1__
71 #define KERN_PA_BASE S_EL1_START
72 #elif defined __KERNEL_EL2__
73 #define KERN_PA_BASE NS_EL2_START
74 #elif defined __KERNEL_EL3__
75 #define KERN_PA_BASE EL3_START
76 #else
77 #error "Please select the kernel exception level"
78 #endif
79 
80 #ifdef OTZONE_ASYNC_NOTIFY_SUPPORT
81 #define NS_SGI_NOTIFY_INTERRUPT 0x5
82 #endif
83 
84 /* Kernel Load Address */
85 #define KERN_LA KERN_PA_BASE
86 
87 
88 /* Valid VA ranges for 39 bit VA
89  *
90  * Sub range For EL1 Kernel:(Translated by TTBR1)
91  * 0xFFFFFF8000000000 - 0xFFFFFFFFFFFFFFFF
92  *
93  * Sub range for EL0 :(Translated by TTBR0)
94  * 0x0000000000000000 - 0x0000007FFFFFFFFF
95  *
96  * Range for EL2 & EL3 Kernel: (Translated by TTBR0)
97  * 0x0000000000000000 - 0x0000007FFFFFFFFF
98  *
99  * Refer Fig: D 4-14 of ARM Architecture Reference Manual.
100  */
101 #if defined __KERNEL_EL1__
102 /*
103  * Kernel Virtual Base
104  * Kernel code will be linked to this address
105  */
106 #define KERN_VA_BASE 0xFFFFFFC000000000
107 /* Kernel Guest Image Base*/
108 #define KERN_GUEST_BASE 0xFFFFFFB000000000
109 /* Kernel IO Base */
110 #define KERN_IO_BASE 0xFFFFFFA000000000
111 #define KERN_IO_END 0xFFFFFFAFFFFFFFFF
112 
113 #elif defined __KERNEL_EL2__
114 
115 #define KERN_VA_BASE 0x0000004000000000
116 #define KERN_GUEST_BASE 0x0000006000000000
117 #define KERN_IO_BASE 0x0000007000000000
118 #define KERN_IO_END 0x0000007FFFFFFFFF
119 
120 #elif defined __KERNEL_EL3__
121 
122 #define KERN_VA_BASE 0x00000000f8000000
123 #define KERN_GUEST_BASE 0x0000006000000000
124 #define KERN_IO_BASE 0x0000007000000000
125 #define KERN_IO_END 0x0000007FFFFFFFFF
126 
127 #endif /* KERNEL_EL1 */
128 
129 /* Bootstrap related */
130 #define BOOTMAP_SIZE 0x200000 /* 2M */
131 
132 #define KEY_PRESS_IRQ 40
133 #define TICK_TIMER_IRQ 29
134 #define FREE_RUNNING_TIMER_IRQ 0
135 
136 #ifdef __CCODE__
137 #include <sw_types.h>
138 
139 extern void *_binary_lower_el_kernel_start, *_binary_lower_el_kernel_end;
140 
146 pa_t get_secure_ram_start(void);
147 
153 pa_t get_secure_ram_end(void);
154 
155 #ifdef __KERNEL_EL2__
156 extern void *_binary_guest1_dtb_start, *_binary_guest1_dtb_end;
157 #endif
158 #endif /* __CCODE__ */
159 #endif
pa_t get_secure_ram_end(void)
This function returns the End address of the Secure RAM.
Definition: sw_board.c:76
pa_t get_secure_ram_start(void)
This functions returns the starting address of the Secure RAM.
Definition: sw_board.c:65